Texas Instruments TMS320DM355 Manual de usuario descargar pdf (Pagina 149)

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5.18.1 JTAG Test-Port Electrical Data/Timing

RTCK

TDO

TDI

TMS

TCK

TMS320DM355

Digital Media System-on-Chip (DMSoC)

SPRS463A – SEPTEMBER 2007 – REVISED SEPTEMBER 2007

Table 5-48. Timing Requirements for JTAG Test Port (see Figure 5-51 )

DM355

NO. UNIT

MIN MAX

1 t

c(TCK)

Cycle time, TCK 20 ns

2 tw(TCKH) Pulse duration, TCK high 8 ns

3 tw(TCKL) Pulse duration, TCK low 8 ns

4 t

su(TDIV-RTCKH)

Setup time, TDI valid before RTCK high 10 ns

5 t

h(RTCKH-TDIIV)

Hold time, TDI valid after RTCK high 9 ns

6 t

su(TMSV-RTCKH)

Setup time, TMS valid before RTCK high 2 ns

7 t

h(RTCKH-TMSIV)

Hold time, TMS valid after RTCK high 5 ns

Figure 5-51. JTAG Input Timing

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Texas Instruments TMS320DM355 Manual de usuario Pagina 149