Texas-instruments TMS320DM36X Manual de usuario Pagina 6
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List of Figures
1 EMAC and MDIO Block Diagram........................................................................................ 14
2 Ethernet Configuration MII Connections................................................................................ 16
3 Ethernet Frame Format................................................................................................... 18
4 Basic Descriptor Format.................................................................................................. 19
5 Typical Descriptor Linked List............................................................................................ 20
6 Transmit Buffer Descriptor Format ...................................................................................... 23
7 Receive Buffer Descriptor Format....................................................................................... 26
8 EMAC Control Module Block Diagram.................................................................................. 30
9 MDIO Module Block Diagram............................................................................................ 33
10 EMAC Module Block Diagram ........................................................................................... 37
11 EMAC Control Module Interrupt Logic Diagram....................................................................... 55
12 EMAC Control Module Identification and Version Register (CMIDVER)........................................... 60
13 EMAC Control Module Software Reset Register (CMSOFTRESET)............................................... 61
14 EMAC Control Module Emulation Control Register (CMEMCONTROL)........................................... 61
15 EMAC Control Module Interrupt Control Register (CMINTCTRL)................................................... 62
16 EMAC Control Module Receive Threshold Interrupt Enable Register (CMRXTHRESHINTEN) ................ 63
17 EMAC Control Module Receive Interrupt Enable Register (CMRXINTEN)........................................ 63
18 EMAC Control Module Transmit Interrupt Enable Register (CMTXINTEN) ....................................... 64
19 EMAC Control Module Miscellaneous Interrupt Enable Register (CMMISCINTEN).............................. 65
20 EMAC Control Module Receive Threshold Interrupt Status Register (CMRXTHRESHINTSTAT).............. 66
21 EMAC Control Module Receive Interrupt Status Register (CMRXINTSTAT) ..................................... 66
22 EMAC Control Module Transmit Interrupt Status Register (CMTXINTSTAT) ..................................... 67
23 EMAC Control Module Miscellaneous Interrupt Status Register (CMMISCINTSTAT) ........................... 68
24 EMAC Control Module Receive Interrupts per Millisecond Register (CMRXINTMAX)........................... 69
25 EMAC Control Module Transmit Interrupts per Millisecond Register (CMTXINTMAX) .......................... 69
26 MDIO Version Register (VERSION) .................................................................................... 70
27 MDIO Control Register (CONTROL).................................................................................... 71
28 PHY Acknowledge Status Register (ALIVE) ........................................................................... 72
29 PHY Link Status Register (LINK)........................................................................................ 72
30 MDIO Link Status Change Interrupt (Unmasked) Register (LINKINTRAW) ....................................... 73
31 MDIO Link Status Change Interrupt (Masked) Register (LINKINTMASKED) ..................................... 74
32 MDIO User Command Complete Interrupt (Unmasked) Register (USERINTRAW).............................. 75
33 MDIO User Command Complete Interrupt (Masked) Register (USERINTMASKED) ............................ 76
34 MDIO User Command Complete Interrupt Mask Set Register (USERINTMASKSET)........................... 77
35 MDIO User Command Complete Interrupt Mask Clear Register (USERINTMASKCLEAR) .................... 78
36 MDIO User Access Register 0 (USERACCESS0) .................................................................... 79
37 MDIO User PHY Select Register 0 (USERPHYSEL0) ............................................................... 80
38 MDIO User Access Register 1 (USERACCESS1) .................................................................... 81
39 MDIO User PHY Select Register 1 (USERPHYSEL1) ............................................................... 82
40 Transmit Identification and Version Register (TXIDVER) ............................................................ 86
41 Transmit Control Register (TXCONTROL) ............................................................................. 86
42 Transmit Teardown Register (TXTEARDOWN) ....................................................................... 87
43 Receive Identification and Version Register (RXIDVER)............................................................. 88
44 Receive Control Register (RXCONTROL) ............................................................................. 89
45 Receive Teardown Register (RXTEARDOWN) ....................................................................... 89
46 Transmit Interrupt Status (Unmasked) Register (TXINTSTATRAW) ............................................... 90
47 Transmit Interrupt Status (Masked) Register (TXINTSTATMASKED).............................................. 91
6
List of Figures SPRUFI5B–March 2009–Revised December 2010
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© 2009–2010, Texas Instruments Incorporated
- User's Guide 1
- Read This First 10
- Submit Documentation Feedback 12
- Data Input/Output (MDIO) 13
- 1.3 Functional Block Diagram 14
- 2 Architecture 15
- 2.1 Clock Control 15
- 2.2 Memory Map 16
- 2.3 Signal Descriptions 16
- 2.4 Pin Multiplexing 17
- 2.6 Programming Interface 19
- Architecture 21
- 2.7 EMAC Control Module 30
- 2.8 MDIO Module 33
- 2.9 EMAC Module 37
- 2.11 Packet Receive Operation 44
- 2.14 Transfer Node Priority 50
- 2.15 Reset Considerations 50
- 2.16 Initialization 51
- 2.17 Interrupt Support 55
- 2.18 Power Management 59
- 2.19 Emulation Considerations 59
- EMAC Control Module Registers 60
- Field Descriptions 62
- (CMRXTHRESHINTEN) 63
- Table 15 65
- (CMRXTHRESHINTSTAT) 66
- Table 19 68
- 4 MDIO Registers 70
- MDIO Registers 71
- (USERINTMASKCLEAR) 78
- Table 34 80
- Table 36 82
- Table 41 88
- Table 46 92
- Table 47 93
- Table 52 97
- Table 53 98
- (RXMBPENABLE) 101
- Table 59 104
- Table 60 105
- Reserved 109
- Appendix A Glossary 131
- Appendix A 132
- Appendix B Revision History 133
- IMPORTANT NOTICE 134
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