Texas Instruments TMS320F20x/F24x Manual de usuario Pagina 1

TMS320F20x/F24x DSPEmbedded Flash MemoryTechnical ReferenceThis document contains preliminary data current as of publication date and is subjectto cha

Contentsx A.1.1 Header File for Constants and Variables, SVAR20.H AĆ2. . . . . . . . . . . . . . . . . . . . . A.1.2 Clear Algorithm, SCLR20.ASM AĆ5.

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARY A-48PRELIMINARYextern int erase(); /* Declare external func for flash era

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARYA-49Assembly Source Listings and Program ExamplesPRELIMINARY/*************

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARY A-50PRELIMINARY.bss :{} > B1 PAGE 1.cinit :{} > B1 PAGE 1.const :

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARYA-51Assembly Source Listings and Program ExamplesPRELIMINARYOR #06fh ; set

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARY A-52PRELIMINARY* Step 5. begin code that will initialize the ’240 registe

IndexPRELIMINARYIndex-1PRELIMINARYIndexAaccess modescode for changing A-25array access 2-5, 2-10, 2-11, 2-16, 3-8register access 2-5, 2-10, 2-11, 3-11

IndexPRELIMINARYIndex-2PRELIMINARYerase algorithmassembly code (SERA2x.ASM) A-10described 3-10 to 3-13flow diagram 3-13in overall flow 3-10erase() fun

IndexPRELIMINARYIndex-3PRELIMINARYMmargindetermining 3-5, 3-11ensuring data retention 1-2improving 3-12in programming 2-13restoring after flash–write

IndexPRELIMINARYIndex-4PRELIMINARYsubroutines used by all algorithms (SU-TILS2x.ASM) A-25SUTILS2x.ASM file (code for subroutines) A-25SVAR2x.H file (h

FiguresxiContentsFigures1–1 TMS320F20x/F24x Program Space Memory Maps 1Ć4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1 Flash Mem

Tablesxii Tables1–1 TMS320 Devices With On-Chip Flash EEPROM 1Ć3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1 Operations tha

1-1IntroductionThe TMS320F20x/F24x digital signal processors (DSPs) contain on-chip flashEEPROM (electrically-erasable programmable read-only memory).

Basic Concepts of Flash Memory TechnologyPRELIMINARY 1-2PRELIMINARY1.1 Basic Concepts of Flash Memory TechnologyThe term flash in this EEPROM technolo

TMS320F20x/F24x Flash ModulePRELIMINARY1-3IntroductionPRELIMINARY1.2 TMS320F20x/F24x Flash ModuleThe ’F20x/F24x flash EEPROM is implemented with one o

TMS320F20x/F24x Flash ModulePRELIMINARY 1-4PRELIMINARYSimplified memory maps for the program space of the TMS320F20x/F24x de-vices are shown in Figure

Benefits of Embedded Flash Memory in a DSP SystemPRELIMINARY1-5IntroductionPRELIMINARY1.3 Benefits of Embedded Flash Memory in a DSP SystemThe circuit

PRELIMINARY 1-6PRELIMINARY

2-1Flash Operations and Control RegistersThe operations that modify the contents of the ’F20x/F24x flash array are per-formed in software through the

IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or servic

Operations that Modify the Contents of the ’F20x/F24x Flash ArrayPRELIMINARY 2-2PRELIMINARY2.1 Operations that Modify the Contents of the ’F20x/F24x F

Operations that Modify the Contents of the ’F20x/F24x Flash ArrayPRELIMINARY2-3 Flash Operations and Control RegistersPRELIMINARYThis procedure is dis

Operations that Modify the Contents of the ’F20x/F24x Flash ArrayPRELIMINARY 2-4PRELIMINARYFigure 2–1. Flash Memory Logic Levels During Programming an

Accessing the Flash ModulePRELIMINARY2-5 Flash Operations and Control RegistersPRELIMINARY2.2 Accessing the Flash ModuleIn addition to the flash memor

Accessing the Flash ModulePRELIMINARY 2-6PRELIMINARYFigure 2–2. Memory Maps in Register and Array Access ModesSEG_CTR registerTST registerWADRS regist

Accessing the Flash ModulePRELIMINARY2-7 Flash Operations and Control RegistersPRELIMINARYAlthough the function is the same, the access control regist

Flash Module Control RegistersPRELIMINARY 2-8PRELIMINARY2.3 Flash Module Control RegistersTable 2–2 lists the control registers and their relative add

Flash Module Control RegistersPRELIMINARY2-9 Flash Operations and Control RegistersPRELIMINARYTable 2–3. Segment Control Register Field DescriptionsBi

Flash Module Control RegistersPRELIMINARY 2-10PRELIMINARYTable 2–4. Flash Array Segments SummarySEG7–SEG0 Bits ’F206/F240 Flash Module†’F241/F243Array

Flash Module Control RegistersPRELIMINARY2-11 Flash Operations and Control RegistersPRELIMINARY2.3.4 Write Data Register (WDATA)The write data registe

iii PRELIMINARYPrefaceRead This FirstAbout This ManualThis reference guide describes the operation of the embedded flash EEPROMmodule on the TMS320F2

Read ModesPRELIMINARY 2-12PRELIMINARY2.4 Read ModesThe ’F20x/F24x flash module uses four read modes and corresponding setsof reference levels: Standa

Program OperationPRELIMINARY2-13 Flash Operations and Control RegistersPRELIMINARY2.5 Program OperationThe program operation of the ’F20x/F24x flash m

Erase OperationPRELIMINARY 2-14PRELIMINARY2.6 Erase OperationThe erase operation of the ’F20x/F24x flash module prepares the flash arrayfor programmin

Recovering From Over-Erasure (Flash-Write Operation)PRELIMINARY2-15 Flash Operations and Control RegistersPRELIMINARY2.7 Recovering From Over-Erasure

Reading From the Flash ArrayPRELIMINARY 2-16PRELIMINARY2.8 Reading From the Flash ArrayOnce the array is programmed, it is read in the same manner as

3-1Algorithm Implementationsand Software ConsiderationsThis chapter discusses the implementations of the algorithms for performingthe operations descr

How the Algorithms Fit Into the Program-Erase-Reprogram FlowPRELIMINARY 3-2PRELIMINARY3.1 How the Algorithms Fit Into the Program-Erase-Reprogram Flow

How the Algorithms Fit Into the Program-Erase-Reprogram FlowPRELIMINARY3-3Algorithm Implementations and Software ConsiderationsPRELIMINARYFigure 3–1.

Programming (or Clear) AlgorithmPRELIMINARY 3-4PRELIMINARY3.2 Programming (or Clear) AlgorithmThe programming algorithm sequentially writes any number

Programming (or Clear) AlgorithmPRELIMINARY3-5Algorithm Implementations and Software ConsiderationsPRELIMINARYThe main feature of the program/clear al

PRELIMINARYivPRELIMINARYIf you are looking for in-formation about:Turn to these locations:Over-erasure (depletion) andrecoverySection 1.1, Basic Conc

Programming (or Clear) AlgorithmPRELIMINARY 3-6PRELIMINARYFigure 3–3. Programming or Clear Algorithm FlowSame rowDevice failureContinueCurrentaddress

Programming (or Clear) AlgorithmPRELIMINARY3-7Algorithm Implementations and Software ConsiderationsPRELIMINARYAnother important consideration is the t

Programming (or Clear) AlgorithmPRELIMINARY 3-8PRELIMINARYTable 3–1. Steps for Verifying Programmed Bits and Applying One Program or ClearPulse (Conti

Programming (or Clear) AlgorithmPRELIMINARY3-9Algorithm Implementations and Software ConsiderationsPRELIMINARYBefore each program pulse is applied, a

Erase AlgorithmPRELIMINARY 3-10PRELIMINARY3.3 Erase AlgorithmThe erase algorithm follows the clear algorithm in executing the entire initial-ization f

Erase AlgorithmPRELIMINARY3-11Algorithm Implementations and Software ConsiderationsPRELIMINARYTable 3–2. Steps for Applying One Erase PulseStep Action

Erase AlgorithmPRELIMINARY 3-12PRELIMINARY4) The actual address is restored.5) The contents of the restored address are read.The advantage of this app

Erase AlgorithmPRELIMINARY3-13Algorithm Implementations and Software ConsiderationsPRELIMINARYFigure 3–5. Erase Algorithm FlowProgram arraycheckDeplet

Flash-Write AlgorithmPRELIMINARY 3-14PRELIMINARY3.4 Flash-Write AlgorithmThe flash-write operation recovers bits in depletion mode, which can becaused

Flash-Write AlgorithmPRELIMINARY3-15Algorithm Implementations and Software ConsiderationsPRELIMINARYTable 3–3. Steps for Applying One Flash-Write Puls

Related Documentation From Texas InstrumentsPRELIMINARYv Read This FirstPRELIMINARYRelated Documentation From Texas InstrumentsThe following books de

Flash-Write AlgorithmPRELIMINARY 3-16PRELIMINARYFigure 3–7. Flash-Write Algorithm FlowStartDepletioncheckNoYesNoYesFlash-writepulse count≥ Max† ?Devic

Flash-Write AlgorithmPRELIMINARY3-17Algorithm Implementations and Software ConsiderationsPRELIMINARYThe CPU frequency range for the application is an

PRELIMINARY 3-18PRELIMINARY

A-1Appendix AAssembly Source Listings andProgram ExamplesThe flash array is erased and programmed by code running on the DSP core.This code can origin

Assembly Source for AlgorithmsPRELIMINARY A-2PRELIMINARYA.1 Assembly Source for AlgorithmsThe algorithm source files implement the flows given in Chap

Assembly Source for AlgorithmsPRELIMINARYA-3Assembly Source Listings and Program ExamplesPRELIMINARY**************************************************

Assembly Source for AlgorithmsPRELIMINARY A-4PRELIMINARY*CONSTANTS***********************************************************Conditional assembly vari

Assembly Source for AlgorithmsPRELIMINARYA-5Assembly Source Listings and Program ExamplesPRELIMINARYA.1.2 Clear Algorithm, SCLR20.ASMThis code is an i

Assembly Source for AlgorithmsPRELIMINARY A-6PRELIMINARY* programmed bits. For example, if the flash is programmed ** using a CLKOUT period of 50 ns,

Assembly Source for AlgorithmsPRELIMINARYA-7Assembly Source Listings and Program ExamplesPRELIMINARYSACL FL_ST ;Save array start address.LACL FL_ADRS

Related Documentation From Texas InstrumentsPRELIMINARYviPRELIMINARYTMS320C2xx C Source Debugger User’s Guide (literature numberSPRU151) tells you how

Assembly Source for AlgorithmsPRELIMINARY A-8PRELIMINARY* SPAD2 Flash program + EXE command. *********************************************************

Assembly Source for AlgorithmsPRELIMINARYA-9Assembly Source Listings and Program ExamplesPRELIMINARYTBLW SPAD1 ;EXECUTE COMMAND *LAR AR6,#D10 ;SET DEL

Assembly Source for AlgorithmsPRELIMINARY A-10PRELIMINARYA.1.3 Erase Algorithm, SERA20.ASMThis code is an implementation of the erase algorithm descri

Assembly Source for AlgorithmsPRELIMINARYA-11Assembly Source Listings and Program ExamplesPRELIMINARY* The erase pulse duration is 7ms, and a maximum

Assembly Source for AlgorithmsPRELIMINARY A-12PRELIMINARYCLRC OVM ;Disable overflow mode.LACL SEG_ST ;Get segment start address.AND #04000h ;Get array

Assembly Source for AlgorithmsPRELIMINARYA-13Assembly Source Listings and Program ExamplesPRELIMINARY***** If here, then an error has occurred.EXIT SP

Assembly Source for AlgorithmsPRELIMINARY A-14PRELIMINARY* ** The following resources are used for temporary storage: ** BASE_0 Flash STOP command, an

Assembly Source for AlgorithmsPRELIMINARYA-15Assembly Source Listings and Program ExamplesPRELIMINARYA.1.4 Flash-Write Algorithm, SFLW20.ASMThis code

Assembly Source for AlgorithmsPRELIMINARY A-16PRELIMINARY* BASE_3 Used for EXE + flw cmd *************************************************************

Assembly Source for AlgorithmsPRELIMINARYA-17Assembly Source Listings and Program ExamplesPRELIMINARYBCND FL_WRITE, NEQ ;If ACC<>0, then flwrite

If You Need Assistance . . .PRELIMINARYvii Read This FirstPRELIMINARYIf You Need Assistance . . .- World-Wide Web SitesTI Online http://www.ti.comSem

Assembly Source for AlgorithmsPRELIMINARY A-18PRELIMINARYLAR AR0,#MAX_FLWCMPR 2 ;If AR1>MAX_FLW thenBCND EXIT,TC ;Fail, don’t continue recovery.B I

Assembly Source for AlgorithmsPRELIMINARYA-19Assembly Source Listings and Program ExamplesPRELIMINARYA.1.5 Programming Algorithm, SPGM20.ASMThis code

Assembly Source for AlgorithmsPRELIMINARY A-20PRELIMINARY* bits. For example, if the flash is programmed using a ** CLKOUT period of 50 ns, the flash

Assembly Source for AlgorithmsPRELIMINARYA-21Assembly Source Listings and Program ExamplesPRELIMINARY* BASE_3 Used for buffer/row start addr ** BASE_4

Assembly Source for AlgorithmsPRELIMINARY A-22PRELIMINARYBCND EXIT,TC ;fail, don’t continue.B SAMEROW ;else, go to beginning;of same row.** If row don

Assembly Source for AlgorithmsPRELIMINARYA-23Assembly Source Listings and Program ExamplesPRELIMINARYSPLK #04000h,FL_ST ;FL_ST = FLASH1 CTRL REGSFL0 R

Assembly Source for AlgorithmsPRELIMINARY A-24PRELIMINARYLACL FL_ST ;ACC => FLASH *SPLK #VER0,SPAD1 ;ACTIVATE VER0 *TBLW SPAD1 ;EXECUTE COMMAND *LA

Assembly Source for AlgorithmsPRELIMINARYA-25Assembly Source Listings and Program ExamplesPRELIMINARYA.1.6 Subroutines Used By All Four Algorithms, SU

Assembly Source for AlgorithmsPRELIMINARY A-26PRELIMINARYSPLK #0000h,SPAD2***********The next instruction is for F240 only*************.if F24X = 1 ;A

C-Callable Interface to Flash AlgorithmsPRELIMINARYA-27Assembly Source Listings and Program ExamplesPRELIMINARYA.2 C-Callable Interface to Flash Algor

PRELIMINARYviiiPRELIMINARY

C-Callable Interface to Flash AlgorithmsPRELIMINARY A-28PRELIMINARY;**Variables included from flash algorithms..include ”svar20.h” ;Variable declarati

C-Callable Interface to Flash AlgorithmsPRELIMINARYA-29Assembly Source Listings and Program ExamplesPRELIMINARY* passes, the flash is ready to be repr

C-Callable Interface to Flash AlgorithmsPRELIMINARY A-30PRELIMINARYADD #1 ;Increment fail count.SACL ERS_COUNT ;Save new count.SUB #10 ;CHECK for max

C-Callable Interface to Flash AlgorithmsPRELIMINARYA-31Assembly Source Listings and Program ExamplesPRELIMINARY;Begin C PreprocessingPOPD *+ ; pop ret

Sample Assembly Code to Erase and Reprogram the TMS320F206PRELIMINARY A-32PRELIMINARYA.3 Sample Assembly Code to Erase and Reprogram the TMS320F206The

Sample Assembly Code to Erase and Reprogram the TMS320F206PRELIMINARYA-33Assembly Source Listings and Program ExamplesPRELIMINARY;data section used fo

Sample Assembly Code to Erase and Reprogram the TMS320F206PRELIMINARY A-34PRELIMINARYSUB #10 ;CHECK for max of 10.BCND ers_error,GT ;If ers_cout>10

Sample Assembly Code to Erase and Reprogram the TMS320F206PRELIMINARYA-35Assembly Source Listings and Program ExamplesPRELIMINARYprg_error:***********

Sample Assembly Code to Erase and Reprogram the TMS320F206PRELIMINARY A-36PRELIMINARYPAGE 1: /* DM – Data memory */BLK_B2: origin = 0x60,length = 0x20

Sample C Code to Erase and Reprogram the TMS320F206PRELIMINARYA-37Assembly Source Listings and Program ExamplesPRELIMINARYA.4 Sample C Code to Erase a

ContentsixContents1 Introduction 1Ć1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Sample C Code to Erase and Reprogram the TMS320F206PRELIMINARY A-38PRELIMINARY{ /*Flash fails programming, EXIT*/while(1){} /*Spin here forever*/}} el

Sample C Code to Erase and Reprogram the TMS320F206PRELIMINARYA-39Assembly Source Listings and Program ExamplesPRELIMINARYFLASH0: origin = 0x0000, len

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARY A-40PRELIMINARYA.5 Sample Assembly Code to Erase and Reprogram the TMS320F240The

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARYA-41Assembly Source Listings and Program ExamplesPRELIMINARY;**Variables included

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARY A-42PRELIMINARYF240INIT: ;Set Data Page pointer to page 1 of the;peripheral fram

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARYA-43Assembly Source Listings and Program ExamplesPRELIMINARYdepletion:LACL ERS_CO

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARY A-44PRELIMINARY****************************************************************

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARYA-45Assembly Source Listings and Program ExamplesPRELIMINARYA.5.2 Linker Command

Sample Assembly Code to Erase and Reprogram the TMS320F240PRELIMINARY A-46PRELIMINARY/*All these sections are for flash programming.*/fl_prg : {} >

Using the Algorithms With C Code to Erase and Reprogram the ’F240PRELIMINARYA-47Assembly Source Listings and Program ExamplesPRELIMINARYA.6 Using the