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6.23 TCP2 Endian Register (TCPEND)

Registers

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The TCP2 endian register (TCPEND) is shown in Figure 53 and described in Table 28 . TCPEND should

only be used when the DSP is set to big-endian mode.

Figure 53. TCP2 Endian Register (TCPEND)

31 8

Reserved

R/W-0

7 2 1 0

ENDIAN_ ENDIAN_

Reserved

EXTR INTR

R/W-0 R/W-0 R/W-0

LEGEND: R/W = Read/Write; R = Read only; - n = value after reset

Table 28. TCP2 Endian Register (TCPEND) Field Descriptions

Bit Field Value Description

31-2 Reserved Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.

1 ENDIAN_EXTR Endianness view of extrinsic table.

0 3,2,1,0,7,6,5,4 ⇒ 7,6,5,4,3,2,1,0 (bytes)

1 0,1,2,3,4,5,6,7 ⇒ 7,6,5,4,3,2,1,0 (bytes)

0 ENDIAN_INTR Endianness view of interleaver table. No effect if in little endian mode.

0 1,0,3,2 ⇒ 3,2,1,0 (halfwords)

1 0,1,2,3 ⇒ 3,2,1,0 (halfwords)

TMS320C6457 Turbo-Decoder Coprocessor 244 SPRUGK1 – March 2009

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Texas Instruments TMS320C6457 Manual de usuario Pagina 44