Texas Instruments TMS320C64X Manual de usuario descargar pdf (Pagina 73)

DSP_fir_gen_hM17_rA8X8

4-45 C64x+ DSPLIB Reference

Special Requirements

- The number of coefficients, nh, must be greater than or equal to 17.

Coefficients must be in reverse order.

- The number of outputs computed, nr, must be a multiple of 8 and greater

than or equal to 8.

- Array r[ ] must be word aligned.

Implementation Notes

- Bank Conflicts: No bank conflicts occur.

- Interruptibility: The code is fully interruptible.

- Load double-word instruction is used to simultaneously load four values

in a single clock cycle.

- The inner loop is unrolled four times and will always compute a multiple

of 4 of nh and nr. If nh is not a multiple of 4, the code will fill in zeros to make

nh a multiple of 4.

- This code yields best performance when the ratio of outer loop to inner

loop is less than or equal to 4.

Benchmarks Cycles: 3*ceil(nh/4)*nr/4+39

Codesize: 416 bytes

1 2 ... 68 69 70 71 72 73 74 75 76 77 78 ... 168 169

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Texas Instruments TMS320C64X Manual de usuario Pagina 73