Texas-instruments TMS320C64x DSP Manual de usuario Pagina 222

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Video Display Registers
4-77Video Display PortSPRU629
Table 420. Video Display Threshold Register (VDTHRLD) Field Descriptions
Description
Bit field
symval
Value
BT.656 and Y/C Mode
Raw Data Mode
3126 Reserved 0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
2516 VDTHRLD2 OF(value) 03FFh Field 2 threshold. Whenever
there are at least VDTHRLD
doublewords of space in the
Y display FIFO, a new Y
DMA event may be
generated. Whenever there
are at least ½ VDTHRLD
doublewords of space in the
Cb or Cr display FIFO, a
new Cb or Cr DMA event
may be generated.
Field 2 threshold. Whenever
there are at least VDTHRLD
doublewords of space in the
display FIFO, a new Y DMA
event may be generated.
1512 INCPIX OF(value) 0Fh Not used. FPCOUNT is incremented
every INCPIX output clocks.
1110 Reserved 0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
90 VDTHRLD1 OF(value) 03FFh Field 1 threshold. Whenever
there are at least VDTHRLD
doublewords of space in the
Y display FIFO, a new Y
DMA event may be
generated. Whenever there
are at least ½ VDTHRLD
doublewords of space in the
Cb or Cr display FIFO, a
new Cb or Cr DMA event
may be generated.
Field 1 threshold. Whenever
there are at least VDTHRLD
doublewords of space in the
display FIFO, a new Y DMA
event may be generated.
For CSL implementation, use the notation VP_VDTHRLD_field_symval
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